For many applications, it is advantageous to employ multilayer structures which consist of materials whose processing requirements are not necessarily compatible. In particular, some crystalline materials only display desirable qualities when they are highly ordered. Examples are silicon, whose electrical behavior varies dramatically from the single crystal to polycrystalline films to amorphous layers, quartz, which is only piezoelectric in its crystalline state, and high temperature superconductors, which have very high critical current densities only when all of the individual grains of a sample are strongly aligned. Technology exists to produce most materials in their preferred forms, but processing windows can be very narrow. The result is that it is virtually impossible to produce certain structures which incorporate a material of this type with a different material when the two materials' narrow processing windows do not overlap.
One such desirable structure consists of two or more conducting layers spaced apart by intervening layers of insulating, or dielectric, materials. A particular example is the interconnect substrate for a multichip module. Up to several dozen layers, as many as 64 in one case, of a conductor such as copper are separated by insulating layers, often polyimide, to form a platform on which many semiconductor integrated circuits, or chips, can be supported and electrically interconnected. This very large number of layers derives from the need for a large the number of connections whose dimensions are constrained by the resistivity of copper and the attendant problem of heat dissipation. In principle, topology and function necessitate only four layers: power, ground, and two signal planes.
The 1986 discovery of superconductivity at temperatures more practical than that of liquid helium (up to 125K in some cuprates) sparked interest in using superconductors as interconnects in multichip modules (MCM's). If several dozen layers of interconnect could be replaced by two layers of superconducting interconnect, MCM's would be far less complex and expensive to manufacture. Furthermore, interconnect layouts could be kept much simpler, involving only two planes rather than complex three-dimensional structures containing numerous layers. In order to achieve the replacement, however, technological innovations were required. First, the superconductors must be able to carry large currents for long distances in narrow lines. Second, the dielectric material must have a low dielectric constant to minimize the propagation time of the signals. Third, the dielectric layer must have an appropriate thickness to provide impedance matching between the interconnects and the devices to which they connect. For standard 50-.OMEGA. lines, the dielectric thickness must be comparable to the conductor width. Of course, the structure must remain intact during processing for it to have any value at all. So far it has not been possible to meet all of these goals by growing a series of epitaxial layers. The peculiarities of the crystal chemistry of the perovskite superconductors has severely restricted the combinations of substrates, superconductors, and insulators that can be used together. Ferroelectric materials which have similar crystal structures and chemistries have similar problems with incompatibility. The table below sets out the electrical properties of currently available epitaxial insulators which can be used with high temperature superconductors and related ferroelectrics.
TABLE 1 ______________________________________ Available epitaxial dielectric materials. Material Lattice Constant Dielectric Constant ______________________________________ Al.sub.2 O.sub.3 r-plane 0.348 nm 9-10 MgO 0.421 nm 10 CeO.sub.2 0.541 nm 11-15 LaAlO.sub.3 0.379 nm 23 YSZ 0.514 nm 25 SrTiO.sub.3 0.391 nm 150 CaTiO.sub.3 0.382 nm 1000 BaTiO.sub.3 0.401 nm 1650 ______________________________________
This trilayer structure, comprising a conducting layer, a dielectric layer, and another conducting layer, is a common geometry used in thin film multilayer electronic devices. A typical example of such a structure is a microstrip transmission line. The present invention deals with the case in which the conducting layers must have specific crystalline orientations as typically provided by their epitaxial growth on selected substrates. Conventionally, to produce the trilayer structure using these materials requires the use of a dielectric layer whose crystalline properties permit epitaxial growth of the conducting layers. Furthermore, in order to process such structures, the growth conditions for the materials, (in terms of temperature, ambient atmosphere, etc.) must be mutually compatible in order to preserve the properties of the constituent layers. In this invention we describe a means of producing the desired trilayer structures in which the restrictions upon the dielectric layer are essentially eliminated.
Another application in which it is desirable to incorporate incompatible materials into a single mechanically stable structure is the case of a ferroelectric memory structure on top of a silicon-based integrated circuit. Since ferroelectric coefficients vary with crystallographic direction, it is necessary for the crystal grains to be highly aligned to take advantage of the hysteresis of these materials. Silicon must also be single crystalline for it to be useful in integrated circuits. (Polysilicon has its own unique properties, but its transport properties are inferior to those of single crystal silicon.) If it were possible to deposit a relatively thick isolation layer on top of the silicon circuitry and then grow the ferroelectric film on top of that with good alignment of the individual grains, these composite structures could be quite useful. Unfortunately, ferroelectrics have rather complicated crystal structures, similar to the high temperature superconductors, and attempts to deposit them on arbitrary materials have resulted in poorly aligned films. By decoupling the growth of the crystalline layers from the deposition of the central isolation layer, the present invention circumvents the problem of incompatible processing conditions in the different materials.